CSE 30 Syllabus

CSE 30 Syllabus
Computer Organization and Systems Programming
(Some Assembly Required)
Spring 2012

Lectures:

Discussion Sections:

Lab:

ieng9.ucsd.edu

Instructor:

Rick Ord

Tutors:

See the Lab Hours schedule for all the Tutors.

Textbook:

Richard P. Paul, SPARC Architecture, Assembly Language Programming & C, 2nd Edition, Prentice Hall, 1999.

References:

Samuel Harbison & Guy Steele, C: A Reference Manual, 5th Edition, Prentice Hall, 2002.
Brian Kernighan & Dennis Ritchie, The C Programming Language, 2nd Edition, Prentice Hall, 1988.
ANSI C Card / Vi Reference Card / Emacs Reference Card
Linda Lamb & Arnold Robbins, Learning the vi Editor, 7th Edition, O'Reilly, 2008.
SPARC Assembly Language Reference Manual [http://docs.sun.com/app/docs/doc/806-3774]

(Ignore SPARC-V9 Instruction Set)

Grading:

You must earn at least 50% of the possible points on the Programming Assignments to receive a passing grade (C- or better).

Major Course Concepts

Basic Computer Organization: High-level concepts related to the structure and organization of computer systems.
Basic Computer Architecture: Computer architecture and assembly language of one specific system in some level of detail (SPARC) with comparison to other common architectures.
Basic Systems Programming: In the past, this was strictly assembly language for a particular processor/OS environment. Today it is mostly C programming with some assembly. Hence the subtitle: Some Assembly Required.

Major Topics	Reading
Intro -- Compilation Sequence / C Runtime Environment	-
The Computer / Data Representations	Ch 1.4 - 1.10
Number Systems / Binary Arithmetic	Ch 3.1 - 3.3; Ch 4.1 - 4.5
SPARC Architecture & Assembly Language / Subroutine Call Mechanics	Ch 2 (no m4 macros); Ch 9.9 - 9.10
Bitwise Operations	Ch 3.4 - 3.5; Ch 4.6 - 4.13
The Stack & Local Variables	Ch 5 & Appendix E
Data Structures	Ch 6
Subroutine Details / Recursion	Ch 7
Floating Point	Ch 11
External Data, Text, and Linkage	Ch 9
SPARC Machine Instructions	Ch 8 & Appendix D
Memory and I/O Hierarchies / System Call Interface	Ch 10
Traps & Exceptions / Memory Management / Virtual Memory	Ch 12 & 13
CPU Components (ALU, Registers, Control Unit, Busses, Caches)	-
RISC vs. CISC / Other Architectures	Ch 14
Other topics of interest as time permits	-

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